Configuration

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VILLASfpga is configured via the standard VILLASnode configuration file. Unlike the other node-types, the fpga node-type requires settings in two places:

• Configuration of the FPGA: FPGA Card
• Configuration of the VILLASnode / VLLASfpga interface: node-config-fpga

This section is a group (like nodes) which allows the user to use multiple FPGA devices at the same time. Like nodes, each FPGA has it's own name:

A string containing the vendor and product of the FPGA card as shown by lscpi.

The slot in which the FPGA card is located as shown by lspci.

The AXI4-Lite base address used to access registers of the interrupt controller.

The AXI4-Lite base address used to access registers of the reset controller.

Should VILLASnode perform a reset of the FPGA board when started?

A list of connections within the FPGA fabric which should be configured. This is analog to the Configuration setting of VILLASnode.

Example

fpgas = {
        vc707 = {
                /* Card identification */
                id = "10ee:7022";
                slot = "01:00.0";

                intc  = 0x5000;
                reset = 0x2000;
                do_reset = true;

                /* Configure switch_0 */
                paths = (
                        { in = "dma_0",  out = "rtds_0" },
                        { in = "rtds_0", out = "dma_0" }
                )
        }
}

Each FPGA IP core requires at least the following setting. Depending on the VLNV of each IP core, additional settings can be configured.

A VLNV identifier to properly identify the version and type of this IP core.

The base address for register access.

The port number of a switch to which this IP core is connected.

Example

fpgas = {
        vc707 = {
                ips = {
                        switch_0 = {
                                vlnv = "xilinx.com:ip:axis_interconnect:2.1"
                                baseaddr = 0x0000;
                                numports = 3;
                        },
                        rtds_0 = {
                                vlnv = "acs.eonerc.rwth-aachen.de:user:rtds_axis:1.0"
                                baseaddr = 0x3000;
                                port = 0;
                        },
                        dma_0 = {
                                vlnv = "xilinx.com:ip:axi_dma:7.1";
                                baseaddr = 0x1000;
                                port = 2;
                                irq = 0
                        }
                }
        }
}